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Architecture critique, contribution questions, fabrication collaboration, or anything else about open silicon — here is the fastest way to reach us.

What we are looking for

Critique, before the architecture gets expensive to change.

The most useful messages we receive point at a weak assumption rather than ask for a feature. If you work on accelerator architecture, compilers, RTL, verification, model runtimes, memory systems, or semiconductor fabrication — that is exactly the conversation we want.

  • Which part should be modelled first?
  • Which assumptions are weakest?
  • Which workloads would expose the architecture's limitations?
  • What should a credible minimum demonstration look like before tape-out?